1. Field of the Invention
The present invention relates to the structure of a semiconductor device and to a method of forming the same. More particularly, the present invention is directed to a contact structure of a semiconductor device and to a method of forming the same.
2. Description of the Related Art
As semiconductor devices become more highly integrated, the space between word lines and the space between interconnections of the devices are becoming more and more narrow. Accordingly, when an interlayer dielectric is formed for isolation between the word lines and between the interconnections, a void may be formed in the interlayer dielectric between the word lines and between the interconnections. Thus, in order to prevent the void from being formed in the interlayer dielectric, the interlayer dielectric is formed by a chemical vapor deposition (CVD) method, and then a reflow process is performed. When the reflow process is carried out with respect to the interlayer dielectric, a low temperature of 900xc2x0 C. or less is required in order to prevent an excessive diffusion of impurities at an impurity diffusion region. Accordingly, a borophosphosilicate glass (BPSG) is used as the interlayer dielectric, because the BPSG can reflow at the low temperature of 900xc2x0 C. or less.
FIGS. 1A and 1B show semiconductor contact structures and a conventional problem in the forming thereof.
Referring to FIGS. 1A and 1B, a lower layer 3 is stacked on a semiconductor substrate 1. A pad 5 of polysilicon doped with phosphorus is formed on the lower layer 3, and then a first interlayer dielectric (ILD) 7 of the BPSG is formed over the pad 5. The reflow process is performed with respect to the first ILD 7. The first ILD 7 is patterned to form a contact hole exposing an upper part of the pad 5. The contact hole is filled with the doped polysilicon and the resultant structure is planarized by a chemical mechanical polishing (CMP) process to form a contact plug 9. A nitride layer 11 is stacked on the planarized surface so as to cover the contact plug 9. Thereafter, a second ILD 13 is stacked on the resultant structure. The second ILD 13 is formed of BPSG. The reflow process is performed with respect to the second ILD 13. At this time, the first ILD 7 formed of the same BPSG also reflows. Thus, as illustrated in FIG. 1B, the contact plug 9 falls over due to a slight movement in the BSPG of the first ILD 7. As a consequence, the contact plug 9 may lift off the pad 5, resulting in a contact failure between the contact plug 9 and the pad 5. This phenomenon may occur whenever the contact plug is positioned in an interlayer dielectric formed of BPSG and a subsequent process is performed at a temperature that is high enough to cause the BPSG to reflow.
An object of the present invention is to provide a semiconductor contact structure having a contact plug that is stable atop the underlying material which the plug contacts. Likewise, another object of the present invention is to provide a method of forming a contact plug in an interlayer dielectric that prevents the contact plug from falling over even if the material of the interlayer dielectric reflows during a subsequent process.
To achieve these objects, the present invention provides a semiconductor contact structure comprising a contact plug having a lower part that is wider than an upper part thereof, and a method of manufacturing the same.
More specifically, the semiconductor contact structure includes an interlayer dielectric formed on a semiconductor substrate, a contact hole penetrating the interlayer dielectric to expose a predetermined region of material on the semiconductor substrate, and a recess formed in the material exposed by the contact hole. The interlayer dielectric may be formed of borophosphosilicate glass (BPSG). The recess includes an undercut region so as to be wider than the contact hole, and the contact plug fills the recess and the contact hole. The contact plug may be formed of polysilicon.
The method of forming the semiconductor contact structure includes the following steps. Firstly, a semiconductor substrate is prepared. An interlayer dielectric is formed on the semiconductor substrate. The interlayer dielectric is patterned to form a contact hole exposing a predetermined region of conductive material on the semiconductor substrate. The exposed material is isotropically etched to form a recess therein that is wider than the contact hole. The isotropic etching process may be performed using a mixture of oxygen (O2), nitrogen trifluoride (NF3) and helium (He). Thus, the recess undercuts the walls defining the sides of the contact hole. The recess and the contact hole are filled to form a contact plug.
The material exposed by the contact hole may be an impurity region formed at the surface of the semiconductor substrate. Alternatively, the material exposed by the contact hole may be a conductive pad formed on the semiconductor substrate. In this case, the conductive pad may be formed of polysilicon.
In addition, a spacer may be formed along the sides of the contact hole, The lower portion of the spacer extends below the level of the upper surface of the surface of the semiconductor substrate. In this case, the undercut formed by the recess is located beneath the upper surface of the semiconductor substrate.